Statistical Framework for Technology-Model-Circuit Co-Design and Convergence

Choongyeun Cho, Daeik Kim, Jonghae Kim, Jean-Olivier Plouchart, and Robert Trzcinski

ACM/IEEE Design Automation Conference (DAC) 2007, 4-8 June 2007 Page(s):503 - 508
DOI: 10.1109/DAC.2007.375217

Abstract

This paper presents a statistical framework to cooperatively design and develop technology, product circuit, benchmarking and model early in the development stage. The statistical data-driven approach identifies device characteristics that are most correlated with a product performance, and estimates performance yield. A statistical method that isolates systematic process variations on die-to-die and wafer-to-wafer levels is also presented. The proposed framework enables translations of interactions among technology, product, and model, and facilitates collaborative efforts accordingly. The proposed methodology has been applied to first three development generations of 65nm technology node and microprocessor product current-controlled oscillators (ICOs) for phase-locked loops (PLLs) that were migrated from 90nm. Automated manufacturing floor in-line characterization and bench RF measurements are used for the methodology. The ICO exhibits yield improvement of RF oscillation frequency from 47% to 99% across three different 65nm SOI technology generations.

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