Decomposition and Analysis of Process Variability Using Constrained Principal Component Analysis
Choongyeun Cho, Daeik Kim, Jonghae Kim, Jean-Olivier Plouchart, Daihyun Lim, Sangyeun Cho, and Robert Trzcinski
IEEE Transactions on Semiconductor Manufacturing, Vol. 21, No. 1, Feb 2008
DOI: 10.1109/TSM.2007.913192
Abstract
Process-induced variability has become a predominant limiter of performance and yield of IC products especially in a deep sub-micron technology. However, it is difficult to accurately model systematic process variability due to the complicated and inter-related nature of physical mechanisms of variation. In this paper a simple and practical method is presented to decompose process variability using statistics of the measurements from manufacturing in-line test structures without assuming any underlying model for process variation. The decomposition method utilizes a variant of principal component analysis and is able to reveal systematic variation signatures existing on a die-to-die and wafer-to-wafer scale individually. Experimental results show that the most dominant die-to-die variation and wafer-to-wafer variation represent 31% and 25% of the total variance of a large set of manufacturing in-line parameters in 65nm SOI CMOS technology. The process variation in RF circuit performance is also analyzed and shown to contain 66% of process variations obtained with manufacturing in-line parameters.Download
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