SOI CMOS Technology with 360GHz fT NFET, 260GHz fT PFET, and Record Circuit Performance for Millimeter-Wave Digital and Analog System-on-Chip Applications
Sungjae Lee, Jonghae Kim, Daeik Kim, Basanth Jagannathan, Choongyeun Cho, Jim Johnson, Brian Dufrene, Noah Zamdmer, Lawrence Wagner, Richard Williams, David Fried, Ken Rim, John Pekarik, Scott Springer, Jean-Olivier Plouchart, and Greg Freeman
IEEE Symposium on VLSI Technology 2007, 12-14 June 2007 Page(s):54 - 55
DOI: 10.1109/VLSIT.2007.4339724
Abstract
We present record-performance RF devices and circuits for an SOI CMOS technology, at 35nm Lpoly. Critical RF/analog figure of merits in FET such as current gain cut-off frequency (fT), 1/f noise, and high-frequency noise figure at various bias and temperature conditions are measured and modeled to enable high-performance circuit design. Measurement results show peak fT's of 340GHz and 240GHz for 35nm Lpoly NFET and PFET, respectively. At sub-35nm Lpoly, 360GHz fT NFET and 260GHz fT PFET are demonstrated. High-Q, high-density vertical native capacitors (VNCAPs) and onchip inductors are integrated. RF-operable ring oscillator (RFRO) demonstrates a 3.58psec delay and a SSB phase noise of - 107dBc/Hz at 1MHz offset. LC-tank VCO operates at 70GHz with 9.5% tuning range. The maximum operating frequency of a static CML divider is 93GHz while dissipating 52.4mW.Download
PDF file<<Go back to the previous page
The papers in this page are provided as courtesy and are presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. Other restrictions to copying individual documents may apply.